DVCon

Between the Dialog and the Algorithm or Innovative Technological Narratives Leveraging the Idea of Authenticity in a Human Being

What is between technology and ethics?

The ethical dilemma is created by the user’s addiction to computer hours, and much like any addiction it creates a type of alienation, through the media. We each build a world of “I” for ourselves through technology, while technology itself is incapable of touching our psyche, and a complex relationship is forged between human and media.

We become the creators of content, in which language and speech exist within this mythical space – a space where the dia-log and the multi-log become an a-log-arithm that produce this existentialism in which we live. We ask to create states of dialogs, where the medium takes active part.

Best Paper Award DVCon-Europe

The Big Data Revolution: Beautiful Servant or Dangerous Monster?

Humanity is shifting the hegemony from science onto data. At Vtool, we continuously strive to reach a state where our minds do not explode from the excess of information particles that engulf us all, which the mind cannot contain. Vtool focuses on creating measuring perceptions that maintain the power of human consciousness.

DVCon China 2018 

Extending UVM components Functionality by using the Visitor design pattern

Visitors are an ideal way to externally and retroactively add functionality to UVM testbenches.
Reporting system using a dedicated tool such as Cogita, making the concept even better.
Particularly beneficial in large and complex SoCs, with large teams and many 3rd party IPs and VIPs .

SemiEngineering​

Forward and Backward Compatibility in IC Designs

Architectural tradeoffs vs. reuse and standards – how do you ensure your IC designs are forward and backward compatible, without carrying unnecessary complexities?

“Everything that goes into bigger systems has to be backward-compatible until all the old components in some system are replaced with the newer versions,” said Aleksandar Mijatovic, Digital Design Manager at Vtool, and Olivera Stojanovic, Project and Business Development Manager at Vtooll, adds, “Market demand and tradeoff between price (die size) and the volume dictate if the legacy features will be supported in the new versions of the chip.”

Using AI And Bugs To Find Other Bugs

At Vtool we’ve been reinventing debug – with the power of AI, to cope with increasing complexity and more mission- and safety-critical SoC applications

“Instead of relying on our personal notebooks for our bug-finding activities, verification engineers can now turn to Cogita. It’s like an automated notebook and a debug companion reminding us if we’ve already done something or suggesting the best solution in similar situations,” says Darko Tomusilovic, Vtool Verification Leader.

Speeding Up AI With Vector Instructions

The semiconductor industry is on a constant quest to speed up AI and ML, while optimizing hardware for vector instructions. This ultimately improves performance and power efficiency.

“Verifying vector instructions is done using the same workflow like any other processor verification, but the modelling of such instructions is much more complex,”explains
Darko Tomusilovic, Vtool Verification Leader.

Using Verification Data More Effectively

⚡️ It’s efficiency we’re talking about, it’s all about efficiency ⚡️

Are your regressions optimally set to get results fast and reach coverage effectively? 

Vtool’s experts Olivera Stojanovic and Darko Tomusilovic joined the conversation, sharing some tips and tricks on how to understand and utilize regression failure.

Israel: Startup Powerhouse

“Being one of the homelands for numerous tech innovations, Israel keeps bringing forth semiconductor startups by cultivating the entrepreneurial spirit and an excellent educational system,” says Hagai Arbel, Vtool CEO

Vtool proudly represents this innovative powerhouse community, in Israel and worldwide, and has always applied a long-term mindset focused towards consistent growth and impacting the future of technology.

In the article, Hagai Arbel discusses the ability of Israelis to create quality startups alongside their limited capacity to scale and morph into large, long-lasting semiconductors companies.

New Uses for Assertions

Let’s examine assertions… We all use them in formal verification, but what more can they be good for? Well, you have to be a pro to know, as Vtool’s expert Olivera Stojanovic says:

“Our verification experts find that the more assertions are used, the more value is gained. Assertions have been used in RTL design, formal and functional verification, shortening debug by identifying the buggy part of the code. The challenge for verification engineers is implementing and debugging complex assertions, used to check the protocol timings on the interface.”

Components for Open Source Verification

Vtool is on a mission to enable faster, more effective verification
Darko Tomusilovic points out the importance of this, saying “There are plenty of times when real corner cases are not covered, simply because it was very difficult to express them using functional coverage language.”

Cogita’s visual diagnostics empowers debuggers to fully understand which combinations were hit, in any given simulation, avoiding coverage holes.

Challenges in Using AI in Verification

AI and humans – now, that’s a partnership we love to celebrate at Vtool. The challenge is always to efficiently leverage the strength of both.

Cogita is designed to help exactly where the human mind gets all boggled-up in the data, and cannot remember where they were in the verification process. “Cogita quickly and clearly presents the relevant data – visually, using ML/AI to help us see the bugs and debug much, much faster,”
said Hagai Arbel.

Open-Source Verification

Time to market and the cost of SoCs are pushing companies to make decisions, which include open-source code and 3rd-party UVCs. This makes debugging very involved, you need to find the best way to handle huge logs while focusing only on the relevant ones. This issue goes to even higher dimensions if messages come from encrypted code, where you cannot fine-tune messages that will be visible.

“Including Cogita in the verification process for RISC-V based SoC projects helped our team with easy log handling and managing messages coming from different components,” says OliveraStojanovic, Vtool’s senior verification manager, in a this Semiengineering article.

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