Tel Aviv, Israel – July 29th, 2021 – Vtool Smart Verification announced today the latest release of its Cogita, visual debug platform and the launch of it in Japan and worldwide. Cogita is used in ASIC verification to accelerate debug and help achieve faster chip development cycles with much higher confidence of first-time-right silicon.
The latest Cogita version 3.8.0 includes features that allow faster debug capabilities.
With the latest improvements in the tool’s performance and speed, verification engineers using Cogita are equipped with superior debug capabilities to secure thorough verification of the design and robustness of test benches.
Cogita 3.8.0 includes the following features:
- Visual representation of test results using log files as input
- Easy manipulation and navigation throughout big logs
- Using machine learning algorithms to classify data that provides conclusions and insights, finding the relationship between inputs
- Cogita’s visual engine enables quick understanding of the random sequences associated with tests and regressions
- Finding bugs in the testbench as well as DUT
- Showing waveform with log to make easy SW and HW debug
- Possibility to merge and compare test flow of two different tests/runs and in the same view, to quickly spot the differences of passing and failing log files
- Possibility to load multiple log files from different sources (eg. tarmac as output of execution of the C code on ARM + UVM in the same presentation)
- Saving configurations of players for reuse throughout the project or sharing with the team members
“We are pleased to sell the latest Cogita in Japan. The new Cogita shows text-based log file visually which helps easily understand behavior of the system. Also, Cogita will help Japanese customers debugging not only RTL but also test scenario. With the enhanced machine learning feature, Cogita provides a unique advantage and improvement of the debug process.” said Tsunemori Kawahara, Nextream President and CEO.
“We believe the latest Cogita will have a positive impact in leveraging Cogita’s new features to enhance and accelerate ASIC verification debug, bringing new chips to the market faster and with higher confidence in their performance. Nextream team, led by Mr. Kawahara Tsunemori, has significant experience and presence in the market, and will introduce the innovative benefits of using Cogita in verification to the semiconductor community in Japan.”, said Hagai Arbel, Vtool CEO.
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