Vtool goes to JobFair Xanthi!
obFair Xanthi, here we come🚀
Join our bug-fighters in Xanthi, pass by our booth and accelerate your career at Vtool🐞
We’ve got it covered🤘
Come see how Vtool supports your success with our new Universa RISC-V SoC, Vtool’s Cogita-PRO EDA solution, and our AtoZ HW/SW consulting services.
Vtool goes to ChipEx!
Getting ready for the big event in our hometown!
ChipEx2023, Tel-Aviv Expo Center, May 9.
Join Vtool at Open Day in Nis!
Our Vtool community in Nis will be at the Open Day at the University of Nis, Faculty of Electronic Engineering!
Our community in Poland has a packed week ahead!
Our CEO Hagai Arbel is traveling to Kraków and Gliwice, where Vtool will host lectures as part of our collaboration with the local universities.
Our Greek team cooked with the social kitchen ” O allos anthropos”
Our Greek team cooked with the social kitchen “O allos anthropos” and served food in Aristotelous square.
How to check if a file exists from a test?
Did you know that you can check inside your Specman code if a particular file exists in your project?
How to use code refactoring in DVT?
This document shows how to use the Refactoring option in DVT in order to rename variables/classes/interfaces, and how to simply extract part of the code to a function.
How to get a detailed description of an error in Cadence Xcelium tool
In this document it will be shown how to get a detailed description of the error in all stages of the simulation process when you run a test in Cadence Xcelium.
Bidirectional assignment – tranif
If you are trying to model out a bidirectional mux, the tranif primitives might be more appropriate to use.