How to apply a stub on a selected instance of a given module

Vtool_Tips_Tricks_How_to_apply_a_stub_on_a_selected_instance_of_a_given_module

It is common, when working on a verification of a large design, that one wants to apply stub (or “blackbox”) only on a certain instance of a given module. This simply makes the simulation of this testcase much faster, and therefore accelerates the verification process.

How to access out of scope signals when using SVA modules

Vtool_Tips_Tricks_Aleksandra_Zigan

Assertions are written inside SVA modules which are instantiated, using a bind statement, on top of most hierarchy levels that have all the signals needed for assertions. Sometimes, there is not one hierarchy that contains all of the necessary signals for a single assertion.

How to change colors for the projects in DVT

Vtool_How_to_change_colors_for_projects_in_DVT

If you have multiple projects open in DVT and you are opening files from two different projects, it can get confusing which file belongs to which project, and perhaps you will mistakenly edit the wrong file.

How to Fix the Issue with “Generate” Loop Label?

Vtool_How_To_Fix_The_Issue_With_Generating_Loop_Label

If you are trying to access a module somewhere inside of the DUT hierarchy, you may encounter an issue on the way to the module if it is instantiated by a generate loop that is not explicitly labeled with a name, which will in that case be labeled implicitly during elaboration.

Contact Us

Please, enter your details below. We will get back to you as fast as we can.

This website uses cookies to ensure you get the best experience on our website.

Get Cogita

Please, enter your details below. We will get back to you as fast as we can.

Thank you!

We will get in touch soon.

Get a Quote

Please, enter your details below. We will get back to you as fast as we can.