Tel Aviv-Yafo, June 15th, 2022, Vtool Ltd. announced today a new release of Cogita, an Accelerated Verification Debug Solution. A new release of this solution by Vtool brings a wide range of enhancements such as the ones listed below:
Cogita’s support of multiple log files opens up and widens Cogita’s possibilities to create entirely different applications.
In particular, projects where data is logged in miscellaneous places (such as large SoC projects or embedded projects). This feature makes Cogita applicable for different verification methods like formal verification or some aspects of emulation systems.
Native support of Fast Signal DataBase (FSDB) allows users to acquire data from the database of any size, recusing the amount of memory used for processing and speeding up the whole mechanism at the same time.
“This is a fundamental change for all potential and actual Cogita users. We significantly enhanced the user’s experience due to a performance boost” said Hagai Arbel, CEO and co-founder of Vtool Ltd. “Cogita is an excellent example of the evolution from a bunch of the ideas based on our engineering experience to real off-the-shelf solutions for any kind of engineering group.”
Vtool’s Cogita is a first-of-its-kind debug platform, applying visual analysis principles and machine learning algorithms to optimize simulation debugging significantly. It has driven the success of several complex ASICs worldwide.
Learn more at thevtool.com/product
Vtool Smart Verification answers the ever-increasing need for faster, more reliable ASIC and FPGA development cycles. Operating in Israel, France, Serbia, Poland, and Greece, Vtool is a verification EDA company that invented the innovative debug solution Cogita and an established ASIC design house that offers cutting-edge development services.
Learn more at thevtool.com.
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