Recently, I had an interesting conversation with a verification leader of one of the world’s leading semiconductors companies. He has some 150 verification engineers in his organization and the group has been exploring EDA solutions for many years.
While we’ve exchanged many ideas about EDA and innovation, one sentence that he said stays in my head:
Whoever will own debug, will own the entire verification flow.
Where the problem lies
Most of the EDA and verification leaders and influencers you’d ask will tell you how important debugging is. It is said to consume 50% of the overall verification effort. But much more importantly, the insufficient debugging ability of the ASIC verification community as a whole is responsible, at least in part, for the 30% first-silicon-success rate, delays in tapeouts, and unpredictable time-to-market of new designs across the industry.
But what is debug, really?