How to mask or unmask certain modules/paths in X-Propagation? ”

What is X-Propagation?

X-propagation refers to the process of propagating or transmitting changes or events across various components or entities within a simulated system. It is a technique used to model how information flows or spreads throughout the system over time. It is indispensable in VCS simulation as it helps to ensure the correctness, reliability, and performance of designs by accurately modeling signal propagation, handling X-states, facilitating verification and debugging, enabling power analysis, supporting fault simulation, and aiding timing analysis.

Why use it in the Simulation?

X-Propagation in the RTL simulator is a way of making the X value run throughout the design to see where it ends up. This is done while configuring the simulator to make the ‘X’ end up in the least amount of places while trying to cover all the places where there might be some ambiguity. Simulations can be run in an X-pessimistic or X-optimistic way, where a pessimistic simulation will produce more X-values.

Vtool_Xpropagation_in_Simulation

X-optimism occurs when the selected one is X and the D output is be X as well, but the simulator instead evaluates D as zero – leaving a false conclusion that the flop was initialized to zero. This leads to potential design errors.
X-pessimism occurs when a definite 0 or 1 value is pessimistically evaluated by the simulator to be X. This leads to false failures reported.

X states can propagate through a simulation, multiplying uncertainty and potentially hiding bugs.
A common source of unwanted X is when the logic states are assigned using ‘if-then-else’ or ‘case’ statements. Because the X state will not satisfy the logic test, the block will be assigned the default case. This may convert the X to a ‘known’ value or propagate it further into the simulation, masking a bug.

Another issue that can happen when signals converge, (for example in a multiple XOR), is when the simulator has to assign the X value to the output if presented with an X on an input that is not overridden by other known signals feeding into the block.

Apart from all these causes, sometimes X-Prop may be led by Testbench issues, such as wrong/missing connections of the I/O ports, by not clearing the FIFO after the full transaction, un-initialized resets, and memories may lead to ‘X’s’.Also, in the VCS Simulation runs the Xprop switch, which will be applied to the top block by default.While running a specific block in the testbench, all sub-tree hierarchies that aren’t utilized are also considered. Some sub-tree hierarchies do not support X-Prop and should be excluded while running (for eg: VIP modules). This can be done by utilizing the X-Propagation Configuration file.

What is X-Propagation Configuration file? How does it help in Simulation with X’s?

The Xprop configuration file is used to define the scope of Xprop instrumentation in a specific design. This file allows you to specify the design hierarchies or modules that should be excluded or included for Xprop instrumentation.
Here are a few examples to exclude specific modules or instances from the hierarchy of simulation.

Vtool_Xpropagation_in_Simulation_2

In the example above, we have three interface connections that we can customize to keep XpropOn or XpropOff based on our needs.

instance (0) {top_tb} {xpropOn}; //Keeping Top block with XpropOn
instance (0) {top_tb.interface_1} {xpropOn}; //Keeping interface1 with XpropOn

instance (1) {top_tb} {xpropOn}; //Keeping Top block with XpropOn
instance (1) {top_tb.interface_2} {xpropOff}; //Keeping interface1 with XpropOff

instance (2) {top_tb} {xpropOn}; //Keeping Top block with XpropOn
instance (2) {top_tb.interface_3} {xpropOff}; //Keeping interface1 with XpropOff

 

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