Six Steps of Bug Hunting

Is Debug bugging you?

Back when I started out as a verification engineer, the thing that bugged us all the most, including me and all of my colleagues, was debug.

When you think about, there are six basic steps to debug that can save everyone a lot of time and bugging. I decided to put them down on paper, and this is how they look:

1. PREP

Start with pen and paper. We kick off the verification with waveform, design tracer, log file, verification, and source code…

2. LOG FILES

We open the log file to hunt down and find the bug, and then we browse through the file to discover the cause of the bug. This is done by reviewing the messages in the log file…

3. GET THE VALUES

Once this is done, we write down the values from the sequence of messages in order to carry on with the journey…

4. MATCH UP

Once we have the values, we try to match them on the waveform if we can…

5. CHECK THE SOURCE

The hunt continues by checking the source code to identify the place in the source code from which the messages are coming. We do this to understand how the values from the messages are calculated.

6. ROLL AGAIN

If the results are still inconclusive, we would usually add a few new messages and rerun the simulation until we flush out the bugs.

Debug process

But what if debug were simpler?

And there it is! Six simple steps, and potentially two or three more just for fun – well, not really. This process can be quite time consuming, and it’s never easy to predict how long it will take to get all the way through it. In some cases, by the time you reach any important conclusions, you may simply have forgotten the steps you took that led you there.

I joined Vtool, and while I was experimenting and playing with Vtool’s visual debugging tool Cogita, I began to ask myself: What if all the steps in the debug process could be centralized in a single platform? In one platform, you could visualize all the messages, and you could easily navigate through log files, switching from messages to source browser and waveform as easily as thinking about it. This would be a great leap forward – an optimized and synchronized way of handling all the debug steps.

After 15 years of working as a verification engineer and verification project lead, I made the decision to set a course for a new journey, taking my career along a different direction – I decided to explore business development. To help me with the right skills and knowledge that I needed for the new role, I enrolled in an Executive MBA program. One of the modules I studied was Operations Management, or best practices to create the highest possible level of efficiency within an organization or a business process.

Vtool faced these challenges all throughout our time spent in verification. Experiencing these problems first-hand, we developed Cogita to help us leverage and speed up the verification process. We wanted to design Cogita as a helpful tool for verification engineers, to help guide them through debug in an interactive, more efficient, and centralized way.

In Operations Management, it is important to explore business operations and the role technology plays in creating strategic differentiation.

Verification teams in semiconductor companies should always be looking to find the optimal way to simplify and facilitate this work which is otherwise quite complex and often protracted. They should include the right technologies and tools to enhance and streamline the debug process.

You see? It could be simpler!

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